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Figure 28.1. Pin Configuration
Alternate function override
Alternate function output enable
Alternate function data out
Por t Con t r ol
Output enable
Output enable
1
Data out
V DD
DOUT
MODEn[ 3:0]
Output value
Pull-up enable
Pull-down enable
Input enable
ESD
protection
ESD diode
Filter enable
DIN
V SS
Alternate function input
Interrupt input
Glitch
suppression
filter
PRS
Analog connection
Note
There is no ESD diode to Vdd because if using LCD voltage boost the pin voltage will be
higher than Vdd. Nevertheless there is an ESD protection block against over voltage.
28.3.1 Pin Configuration
In addition to setting the pins as either outputs or inputs, the GPIO_Px_MODEL and GPIO_Px_MODEH
registers can be used for more advanced configurations. GPIO_Px_MODEL contains 8 bit fields
named MODEn (n=0,1,..7) which control pins 0-7, while GPIO_Px_MODEH contains 8 bit fields named
MODEn (n=8,9,..15) which control pins 8-15. In some modes GPIO_Px_DOUT is also used for extra
configurations like pull-up/down and glitch suppression filter enable. Table 28.1 (p. 394) shows the
available configurations.
Table 28.1. Pin Configuration
MODEx
Input
Output
DOUT
Pull-
Pull-
Alt.
Input
Description
down
up
strength Filter
0b0000
0b0001
0b0010
Disabled
Enabled
Disabled
0
1
0
1
0
On
On
On
Input disabled
Input disabled with pull-up
Input enabled
Input enabled with filter
Input enabled with pull-down
2011-04-12 - d0001_Rev1.10
1
On
394
Input enabled with pull-up
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